Инженер по цифровой обработке радиосигналов на базе FPGA

Conditions:

• Location: Baku, Azerbaijan
• Working days: Monday to Friday
• Working hours: 09:00–18:00 (break: 13:00–14:00)

We are looking for an engineer to design, test and operate radio systems covering FPGA-based digital radio signal processing devices.

Responsibilities

• Developing FPGA-based digital radio signal processing modules in hardware description languages (VHDL, Verilog, SystemVerilog);
• Implementing and porting DSP algorithms (filtering, modulation/demodulation, error-correcting coding) from mathematical models (MATLAB/Simulink) to FPGA architecture;
• Designing interfaces between FPGAs and high-speed ADCs/DACs and external buses (PCIe, JESD204B/C, DDR3/DDR4, etc.);
• Functional verification of developed blocks: writing testbenches, simulation in ModelSim/QuestaSim;
• Synthesis, placement and routing of the design, optimization for timing and FPGA resource usage;
• Debugging the design on hardware test benches using embedded logic analyzers (ChipScope/Signal Tap, Identify);
• Developing accompanying technical documentation for the developed modules.

Requirements

• Higher technical education (radio engineering, communication systems, automation, applied mathematics or a related field);
• 1–2+ years of experience developing FPGA-based digital devices in VHDL and/or Verilog/SystemVerilog;
• Knowledge of the fundamentals of digital signal processing (DSP) and digital circuit design;
• Experience in functional verification (writing testbenches, working with ModelSim/QuestaSim simulators);
• Experience with FPGA vendor CAD tools (Xilinx Vivado/ISE, Intel/Altera Quartus);
• Understanding of the principles of synthesis and optimization of designs for timing and resource utilization;
• Ability to read technical documentation, including in English.

Nice to have

• Experience with high-speed interfaces (PCIe, SATA, JESD204B/C);
• Experience with SoC platforms (Xilinx Zynq, Zynq MPSoC, RFSoC) and Linux on the embedded processor;
• Experience developing error-correcting coding algorithms;
• Experience porting models from MATLAB/Simulink to HDL code;
• Knowledge of the fundamentals of cryptography as applied to hardware implementation.

Interested candidates can apply by filling out the form in the Apply for job button.